The 20th International Symposium on Chemical-Mechanical Planarization will be jointly hosted by Clarkson University’s Center for Advanced Materials Processing (CAMP) and the CMP Users Group of North America, August 7-10 at the Crowne Plaza Lake Placid in Lake Placid, N.Y.
This conference provides an international forum for academic researchers, industrial practitioners, and engineers from around the world for the exchange of information on state-of-the-art research in chemical-mechanical planarization (CMP) technology. More than 130 participants -- a record-- are expected from high technology companies, suppliers, and universities from the United States, Japan, Korea, Taiwan, and Europe.
Chemical-mechanical planarization or chemical-mechanical polishing -- CMP for short -- is a process that uses nano-sized abrasives in a reactive chemical dispersion to polish various layers on the surface of wafers used in semiconductor fabrication to achieve nanolevel planarity (a flat and uniformly smooth surface across 300mm wafers, i.e., over eight orders of magnitude). CMP is an enabling technology that translates into faster computers, more realistic video games, smaller cell phones and more efficient performance from the various electronic devices we use daily in our homes and businesses.
This technology plays a critical role in today’s microelectronics industry and is the only planarizing technology available for use with the interlayer dielectrics and metal films used in all forms of logic and memory devices extending down to14 nanometer feature sizes.
Clarkson University’s Center for Advanced Materials Processing, especially Distinguished University Professor S.V. Babu, are internationally recognized for expertise in this remarkable technology.
This year’s event focuses on several fundamental aspects of chemical-mechanical planarization, including particle and colloidal aspects, polishing mechanisms, pad/conditioning behavior, flow characterization, copper/barrier film planarization, defects and post-polish cleaning, low-k films and integration challenges, 300 mm wafer issues and transition to 450 mm, STI (shallow trench isolation), silicon nitride/polysilicon planarization and polishing of new channel and barrier materials like germanium, indium phosphide, ruthenium, cobalt, silicon carbide, etc.
Babu serves as a lead organizer of this year’s symposium, as he has for the past 19 years. Co-chairs for this CMP Symposium are Hirokuni Hiyama, EBARA; Gautam Banerjee, Air Products; Jin-goo Park, Hanyang University; Lee Cook, Dow Electronic Materials; Daniel Redfield , Applied Materials; Whonchee Lee, Micron; Matt Prince, Intel; Dinesh Koli, Globalfoundries; Raghu Patlolla, IBM; and Arthur Chen, NTUST, Taiwan. Banerji also represented the CMP User’s Group.
This year’s conference will also include a poster session and two keynote speakers. Monday’s keynote speaker, Renhe Jia (Global Slurry Technology Director, Cabot Microelectronics), will speak about the “Challenges and Opportunities in a Maturing IC Marketplace.” Tuesday’s presentation by Manabu Tsujimura (member of the board and chief technology officer, Ebara Corporation) is titled “Innovations by Serendipity.”