Clarkson University Receives $955K from the Army Research Office
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Technology breakthroughs that enable our soldiers to function more quickly and efficiently today are often the direct results of the advances in semiconductor manufacturing processes. New generations of electronic systems for military weapons, communications, and other applications depend on continuous progress in shrinking the minimum feature size to nanoscale and increasing the device complexity for enhanced performance and functionality. One of the most profound effects of shrinking the minimum feature size is the challenge of fabricating complex nanoscale multilevel metallization structures to interconnect the billion or more devices in each chip without creating reliability problems. The most advanced generation memory and logic devices are now manufactured using 300 mm single crystal Si wafers.
Device failures can occur because of malfunctioning interconnect links between wiring layers or in a single layer due, among other things, to external environmental factors such as extremes of heat, pressure, and /or radiation impact encountered in military operations. Smoothening of various heterogeneous surfaces consisting of different conductive and insulating materials to nanolevel planarity is essential to eliminate/minimize the frequency of occurrence of such failures. The required planarity can only be achieved currently by a process called chemical mechanical planarization (CMP). Indeed, during device fabrication each wafer is subjected to the CMP process multiple times. The Clarkson team, consisting of several world renowned experts in addition to Babu and Li, has been working with industry leaders, including IBM and Intel and many of the consumable suppliers, for the past ten years to improve this enabling technology.
In order to carryout the tasks involved in the continuation of the Army Research work, the Clarkson team will use most of the funds to purchase some metrology and process equipment that can handle 300 mm wafers, significantly extending CAMP’s current capabilities.
The equipment to be acquired will consist of a post-CMP wafer scrubber (OnTrak Double Sided Scrubber – DSS-200) for removing residual abrasive particles and corrosive chemicals that may be present on the wafer surface after the planarization step, a long range atomic force profilometer from Park Systems, Inc. to measure nanolevel changes on the wafer surface in both vertical and horizontal dimensions over a “long” horizontal scale, a metal film thickness measurement tool (CDE ResMap 273) for electrically conductive materials and another for non-conducting materials (SCI - FilmTek 2000), with pattern recognition capability.
In addition, a state-of-the-art double platen wafer polisher system (G&P Poli-500) for 100 to 200 mm wafer polishing, including a friction and temperature monitoring system as well as an in situ swing arm type conditioner. This polisher and the other systems will complement two Strasbaugh nHance 6EG 300 mm capable CMP polishers, a dual mode eCP-4i polisher with an attached eCMP module from CETR and an older IPEC 372 as well as several metrology tools that are already available at CAMP. Some of the new systems will be installed in CAMP’s class 10 clean room
SOME CONTINUING CMP PROJECTS:
Ferro Electronic Material Systems, Air Liquide, ASPT, Applied Nanoworks, BASF, Micron Foundation, Rhodia, JSR and Mipox are among some of the companies that are currently funding project research at CAMP on various aspects of CMP. NYSTAR is also supporting some of the NY State company projects in this area with a CAT development contract.