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CAMP
Professor Ming-Cheng Cheng Models Heat Flow in SOI Devices
CAMP Professor
Ming-Cheng Cheng and his group are studying thermal flow in silicon-on-insulator
(SOI) devices in static and dynamic situations. The objectives of
this work are to understand static and dynamic heat flow in SOI
devices and to develop efficient and accurate thermal models for
these devices taking into account self-heating. The study will provide
efficient tools for microelectronic circuit simulation accounting
for self-heating effects on the electronic characteristics of SOI
devices. In addition, information on the temperature profile in
devices and on heat flow to interconnects will lead to a more accurate
prediction of device/interconnect reliability, delay time and power
consumption.
The silicon-on-insulator
CMOS technology will soon dominate the high performance microelectronic
ICs and will play a crucial role in the wireless industry as well.
Although providing superior performance to bulk MOSFETs, SOI MOSFETs
suffer from serious self-heating effects due to the buried oxide.
This induces some crucial cooling and reliability issues in SOI
devices/interconnects.

Fig.
9. Cross section of an SOI MOSFET. tsi, tbox, td and tsub are the
thickness of the Silicon film, buried oxide, isolation oxide and
Silicon substrate, respectively
An example of heat flow modeling in SOI devices is illustrated in
Figures 9 - 11. An SOI structure is given in Figure 9
with isolation oxide indicated by a length of Lox on both sides
of the silicon film. Temperature variations along the x direction
at y = td and tbox are given in Figure
10 and 2D temperature contours in the isolation oxide for x
< 0 are shown in Figure 11. In Figure 10 different values
of interconnect thermal resistance are used. Rth is the SOI thermal
resistance measured between the film and the substrate, and Rint
is the thermal resistance accounting for heat flow from the source,
gate or drain to the interconnects.

Fig. 10. Temperature
variation along the x direction in the SOI MOSFET at Vgs= 1.5V and
Vds=2.4V. Dash/dot lines are from Atlas device simulation coupled
with the heat flow equation. The solid lines are from the developed
analytic thermal model.
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As
can been seen, in addition to the high temperature at the channel-drain
junction, large temperature variation is observed in the silicon
film. This indicates that different amounts of heat flowing out
of the gate and drain/source to interconnects are expected. An analytical
heat flow model developed by Professor Cheng's group is able to
provide very reasonable results compared to those obtained from
the rigorous device simulation coupled with the heat flow equation.

Fig.
11. Temperature contours with 6 degree increments in the isolation
oxide for -1mm< x< 0. Vgs=1.5V
and Vds=2.4V. The substrate temperature To
= 300K.
For
more information about Professor Ming-Cheng Cheng and his research,
you may call him at 315-268-7735 or send email to mcheng@clarkson.edu.
CAMP
Professors Regel and Wilcox Model Crystal Growth
For many years, CAMP Professors Liya L. Regel and William R. Wilcox
have been combining theoretical modeling with their experimental
research on growth of semiconductor crystals, metal alloys, and
diamond films. Some of the resulting papers are shown at http://www.clarkson.edu/~regel/papers.htm.
Modeling methods have included FORTRAN computer code written by
their students, the computer algebra system Maple, FLUENT flow-modeling
software, and HYSYS chemical engineering software. A few recent
projects are summarized below.
New
Method for Deposition of Diamond Films
Professor
Regel invented a new method for deposition of polycrystalline diamond
films using a closed chamber containing hydrogen gas at about 0.1
atmosphere and an electrically heated graphite rod. With the assistance
of CAMP Professor Goodarz Ahmadi, FLUENT was used to calculate the
chemical species produced at equilibrium and the buoyancy-driven
convection in the chamber. Figure 12 shows an example of
a computed flow field.

Figure
12. Flow field for hydrogen gas in diamond deposition chamber.
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